Browsing by Author "Navimipour, N.J."

Now showing 1 - 6 of 6

Citation - Scopus: 13
The Applications of the Routing Protocol for Low-Power and Lossy Networks (rpl) on the Internet of Mobile Things
(John Wiley and Sons Ltd, 2022) Ghanbari, Z.; Jafari Navimipour, Nima; Navimipour, N.J.; Hosseinzadeh, M.; Shakeri, H.; Darwesh, A.; Computer Engineering
Internet of Mobile Things (IoMT) have become very popular recently. The routing protocol for low power and lossy networks (RPL) is standardized for static topologies. However, mobility is the nature of IoT. Mobility serves as a promising candidate to harness hand-off time issues, delay in data transmission, overhead, and low packet delivery rate (PDR) effectively. This study presents a comprehensive account of the mobility-aware RPL-based routing protocols to validate and compare the experimental results. Remarkably, classification methods are used in many articles. The aim is to introduce significant research efforts to improve RPL objective functions (OF) performance in hand-off time, PDR, delay, overhead, and so forth. In this regard, a complete analysis of the existing routing protocols in IoMT has been presented to compare the results. The main focus of this study is on approaches that proposed new OFs for supporting mobility in RPL. Two main categories are considered to study RPL-based routing protocol mechanisms: The mobile and static sink. The related studies on the mobile sink are divided into three groups: Single metric-based OF, composite metric OF, and hybrid routing protocols. Also, the related works based on the static sink are categorized into four groups: Fuzzy logic-based OF, trickle timer-based OF, composite metrics-based OF, and modification control messages-based OF approach. This paper presents a detailed comparison of mechanisms in each category. It also highlights the pros, cons, open issues, and evaluated metrics of each paper. Besides, challenges of mobility in the RPL-based routing protocol mechanism in IoMT for future studies. © 2022 John Wiley & Sons Ltd.
Citation - Scopus: 7
An Efficient Architecture of Adder Using Fault-Tolerant Majority Gate Based on Atomic Silicon Nanotechnology
(Institute of Electrical and Electronics Engineers Inc., 2023) Jafari Navimipour, Nima; Navimipour, N.J.; Bahar, A.N.; Yalcin, S.; Computer Engineering
It is expected that Complementary Metal Oxide Semiconductor (CMOS) implementation with ever-smaller transistors will soon face significant issues such as device density, power consumption, and performance due to the requirement for challenging fabrication processes. Therefore, a new and promising computation paradigm, nanotechnology, can replace CMOS technology. In addition, a new frontier in computing is opened up by nanotechnology called atomic silicon, which has the same extraordinary behavior as quantum dots. Furthermore, Dangling Bond (DB) quantum dots play a vital role in atomic silicon nanotechnology. On the other hand, atomic silicon circuits are highly prone to defects, so suggested fault-tolerant structures in this technology play important roles. The addition operator holds immense significance in digital signal processing and computer arithmetic operations, making it one of the primary operations in digital circuits. Consequently, full adders have gained popularity and find widespread use in efficiently solving mathematical problems. In the following paper, we will explore the development of an efficient fault-tolerant 3-input majority gate (FT-MV3) using DBs, further enhancing the capabilities of digital circuits. A rule-based approach to the redundant DB achieves a less complex and more robust atomic silicon layout for the MV3. We use the powerful SiQAD tool to simulate all the proposed circuits. In addition, to confirm the efficiency of the proposed gate, all common defects, such as single and double dangling bond omission defects and DB dislocation defects, are examined. The suggested majority gate is 100% and 66.66% tolerant against single and double DB omission defects, respectively. Furthermore, a new full adder design is introduced using the suggested FT-MV3 gate. The results show that the suggested full adder is 44.44% and 35.35% tolerant against single and double DB omission defects. Finally, a fault-tolerant four-bit adder is designed based on the proposed full adder. IEEE
Citation - Scopus: 20
An Energy-Aware Scheme for Solving the Routing Problem in the Internet of Things Based on Jaya and Flower Pollination Algorithms
(Springer Science and Business Media Deutschland GmbH, 2023) Sadrishojaei, M.; Jafari Navimipour, Nima; Navimipour, N.J.; Reshadi, M.; Hosseinzadeh, M.; Computer Engineering
Clustering and routing protocols for Internet of Things (IoT) need to consider energy usage and how to reduce it. Unbalanced power usage is a common concern with current solutions to cluster-based routing problems in the IoT ecosystem. This research developed a swarm intelligence-based clustering technique to achieve a more uniform dispersion of cluster heads. The data packets across cluster heads and the sink are routed via a Jaya algorithm. Based on average remaining energy, number of active nodes, number of nodes that have failed or have been removed from the network, and overall network throughput, this combined clustering and routing method's quality has been assessed. The integrative clustering and routing protocol based on the flower pollination algorithm and Jaya algorithm described here exhibit considerable improvements over the current state-of-the-art. The network throughput and the number of the alive node are essential statistics for evaluating IoT in which battery-powered devices periodically acquire surroundings data and transmit gathered samples to a base station. The proposed strategy improved network throughput and the number of dead nodes by at least 14% and 18%, respectively. © 2023, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.
Citation - Scopus: 0
A New Median Filter Circuit Design Based on Atomic Silicon Quantum-Dot for Digital Image Processing and Iot Applications
(Institute of Electrical and Electronics Engineers Inc., 2025) Jafari Navimipour, Nima; Avval, D.B.; Navimipour, N.J.; Rasmi, H.; Heidari, A.; Kassa, S.; Patidar, M.; Computer Engineering
Digital Image Processing (DIP) is the ability to manipulate digital photographs via algorithms for pattern detection, segmentation, enhancement, and noise reduction. In addition, the Internet of Things (IoT) acts as the eye and system for all DIP in various applications. It can possess a camera or another image sensor in order to capture real-time data from its environment. All vital data is processed by image processing in such a way that it recognizes the object, detects an anomaly, and automatically decides in real-time. In addition, in an IoT system, the median filter is the technique used for noise reduction by substituting the value of the pixel with the central value of the surrounding pixels. It provides speed and efficiency for quick analysis in all IoT systems. However, the images can get corrupted, especially in resource-constrained IoT devices with small cameras, because of random glitches. Moreover, using new quantum technology like atomic-scale silicon dangling bond (DB) logic circuits, which have advanced in fabrication and become a strong contender for field-coupled nano-computing, can solve previous problems in IoT systems. In this paper, we propose a unique quantum CSM based on two new proposed Mux and De-mux. The proposed CSM can be used for computational circuits like median filter circuits (MFC) in a wide range of digital circuits, specifically IoT devices. The proposed design is verified and validated using the powerful SiQAD tool. When comparing CSM to the newest designs, the suggested quantum circuit uses 85% less energy and takes up 61% less area. © 2014 IEEE.
Citation - WoS: 0
Citation - Scopus: 0
A New Nano-Scale Authentication Architecture for Improving the Security of Human-Computer Interaction Systems Based on Quantum Computing
(Springer, 2025) Ahmadpour, S.-S.; Jafari Navimipour, Nima; Zohaib, M.; Navimipour, N.J.; Misra, N.K.; Rasmi, H.; Salahov, H.; Hosseinzadeh, M.; Computer Engineering
Human-Computer Interaction (HCI) is an interdisciplinary area of study focusing on the interaction of users and computers by scheming interactive computer interfaces. In addition, HCI systems need security to confirm user authentication, which is a crucial issue in these systems. Hence, user authentication is vital, allowing only authorized users to access data. Authentication is critical to the digital world since it provides security and safety for digital data. Moreover, a digital signature is an authentication method to confirm the accuracy and reliability of digital documents or communications. In addition, designing the circuit based on the complementary metal-oxide semiconductor (CMOS) technology can affect the security and safety of digital data due to the excessive heat dissipation of circuits. On the other hand, quantum-dot cellular automata (QCA) and reversible logic as alternative technologies to CMOS address these problems. Since QCA and reversible logic circuits have minimal energy dissipation, which is considered nearly zero, approaching these technologies proves extremely difficult for any hacker. This work presents an effective structure for the authenticator and human-computer interaction using QCA and IBM quantum computing with Qiskit simulations. The proposed structure has outperformed current circuits in terms of area, cell count, and latency. The paper demonstrates the QCA reversible logic layout of the proposed HCI authenticator and integrates IBM quantum computing simulations using Qiskit for validation. The implementation and testing of results are performed utilizing QCADesigner-2.0.3 and Qiskit simulation tools. The accuracy and efficiency of the proposed design are validated through simulation-derived comparison values, and energy dissipation simulations prove that the suggested circuit dissipates minimal energy. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2025.
Citation - WoS: 2
Citation - Scopus: 2
A New Quantum-Enhanced Approach To Ai-Driven Medical Imaging System
(Springer, 2025) Jafari Navimipour, Nima; Avval, D.B.; Darbandi, M.; Navimipour, N.J.; Ain, N.U.; Kassa, S.; Computer Engineering
Medical Imaging Systems (MIS) play a crucial role in modern medicine by providing accurate diagnostic and treatment capabilities. These systems use various physical processes to create images inside the human body for healthcare professionals to identify and address medical conditions. There is a growing interest in integrating artificial intelligence (AI) in medicine from various sources recently. Presently, with improved algorithms and more significant availability of training data, AI can help or even replace some of the tasks that were being performed by medical professionals. Typically, most MIS performance enhancements are achieved by leveraging transistor-based technologies. However, such implementations showcase certain disadvantages: for instance, slow processing speeds, high power consumption, large physical footprints, and restricted switching frequencies, especially in the GHz range. This could limit the effective performance and efficiency of MIS. Quantum computing, in turn, today appears as an alternative, at least for fully digital circuits in MIS; QCA provides advantages related to higher intrinsic switching speeds (up to terahertz) compared with transistor-based technologies, along with an improved throughput owing to its inherent compatibility with pipelining. QCA also has minimum power consumption and a smaller area of circuitry, which makes it amply suitable for establishing frameworks in circuit design for AI applications. The performance requirement in AI is real-time with minimum energy consumption and minimum cost. The ALU, in this regard, forms the basis for processing and computation units within processor systems. The method presented in this work benefits from the merits of QCA for an ALU design featuring low complexity, high performance, minimum power consumption, maximum speed, and reduced area. This approach has been able to successfully integrate the design of adders and multiplexers with that of basic gates to reduce latency and energy consumption with the aim of improving AI in MIS. The development and simulation of the proposed designs are carefully carried out using QCADesigner 2.0.03 software. A comparison of the different structures proposed shows significant improvements in complexity vs. cell count vs. power consumption compared to earlier designs, hence promising quantum computing for the MIS capability development. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2024.