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A synthesis tool for the multiplierless realization of FIR-based multirate DSP systems

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A synthesis tool for the multiplierless realization of FIR-based multirate DSP systems.pdf (322.7Kb)
Date
2000
Author
Yurdakul, Arda
Abstract
In this study a synthesis tool using a novel multirate folding technique which handles each FIR filter in a multirate DSP system as a single node is developed. A new architecture is presented for the multiplierless realization of a fold of multirate FIR filters. This synthesizer fully exploits the redundancies (i.e. `idle' and `missing' cycles) and common terms in multirate systems without sacrificing from overall system quality to produce multiplierless multirate systems. It also enables the usage of a single clock for all parts of the circuit.

Source

2000 IEEE International Symposium on Circuits and Systems (ISCAS)

Volume

4

Pages

IV-69-IV-72

URI

https://hdl.handle.net/20.500.12469/1754
https://doi.org/10.1109/ISCAS.2000.858690

Collections

  • Araştırma Çıktıları / Scopus [1482]
  • Araştırma Çıktıları / WOS [1412]
  • Bilgisayar Mühendisliği / Computer Engineering [177]

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