Low-Energy 3:2 Compressor Using Xor-Xnor Gate Combined With 2:1 Multiplexer in Qca Technology

dc.authorscopusid 56912219900
dc.authorscopusid 56405207500
dc.authorscopusid 57202686649
dc.authorscopusid 55823161800
dc.contributor.author Kassa, S.
dc.contributor.author Misra, N.K.
dc.contributor.author Ahmadpour, S.-S.
dc.contributor.author Bhoi, B.K.
dc.date.accessioned 2025-01-15T21:38:17Z
dc.date.available 2025-01-15T21:38:17Z
dc.date.issued 2024
dc.department Kadir Has University en_US
dc.department-temp Kassa S., Symbiosis Institute of Technology, Symbiosis International Deemed University, Pune, India; Misra N.K., VIT-AP University, Amaravathi, India; Ahmadpour S.-S., Kadir Has University, Istanbul, Turkey; Bhoi B.K., Veer Surendra Sai University of Technology, Burla, India en_US
dc.description.abstract Abstract: In the field of circuit design, there is a growing trend toward the design of high-speed circuits with a minimum amount of faults on a nanoscale level. In this way, quantum-dot cellular automata (QCA) is a nanoscale-based paradigm that uses a quantum cell with four dots and two electrons to compute logic bits, comparable to transistor-based CMOS architecture. This article focuses on the low-energy compressor design employing an XOR-XNOR gate and a 2:1 multiplexer. Furthermore, a compressor design provides 152 cells employing a coplanar arrangement in QCA with eight majority gates (MG). The compressor energy dissipation is examined using the QCAPro tool, which has various tunneling energy values. Furthermore, the compressor thermal and polarisation layouts are presented. The novel circuit performance is compared with the best existing circuits on QCA regarding cell count, entire area, MG, and latency to assess the newly designed compressor performance. The proposed compressor is tested using the missing cells in the QCADesigner tool. This design has only 5 test vectors, 100% fault coverage, and is best suited for design for testability (DFT). The proposed compressor can be used with various multipliers, including the Wallace tree multiplier, DADDA multiplier, and higher order 7:3 compressor. © Allerton Press, Inc. 2024. en_US
dc.identifier.citationcount 2
dc.identifier.doi 10.3103/S0735272724030014
dc.identifier.endpage 12 en_US
dc.identifier.issn 0735-2727
dc.identifier.issue 1 en_US
dc.identifier.scopus 2-s2.0-85212144083
dc.identifier.scopusquality Q3
dc.identifier.startpage 1 en_US
dc.identifier.uri https://doi.org/10.3103/S0735272724030014
dc.identifier.uri https://hdl.handle.net/20.500.12469/7129
dc.identifier.volume 67 en_US
dc.identifier.wosquality N/A
dc.language.iso en en_US
dc.publisher Allerton Press Inc. en_US
dc.relation.ispartof Radioelectronics and Communications Systems en_US
dc.relation.publicationcategory Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı en_US
dc.rights info:eu-repo/semantics/closedAccess en_US
dc.scopus.citedbyCount 4
dc.subject Binary Compressor en_US
dc.subject Digital Circuits en_US
dc.subject Low-Power en_US
dc.subject Nanocomputing en_US
dc.subject Qca en_US
dc.title Low-Energy 3:2 Compressor Using Xor-Xnor Gate Combined With 2:1 Multiplexer in Qca Technology en_US
dc.type Article en_US
dspace.entity.type Publication

Files