An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm

dc.authoridJafari Navimipour, Nima/0000-0002-5514-5536
dc.authoridAhmadpour, Seyed-Sajad/0000-0003-2462-8030
dc.authorwosidJafari Navimipour, Nima/AAF-5662-2021
dc.contributor.authorJafari Navimipour, Nima
dc.contributor.authorJafari Navimipour, Nima
dc.contributor.authorBahar, Ali Nawaz
dc.contributor.authorMosleh, Mohammad
dc.contributor.authorYalcin, Senay
dc.date.accessioned2023-10-19T15:11:55Z
dc.date.available2023-10-19T15:11:55Z
dc.date.issued2023
dc.department-temp[Ahmadpour, Seyed-Sajad; Jafari Navimipour, Nima] Kadir Has Univ, Dept Comp Engn, Fac Engn & Nat Sci, TR-34083 Istanbul, Turkiye; [Jafari Navimipour, Nima] Natl Yunlin Univ Sci & Technol, Future Technol Res Ctr, Touliu 64002, Taiwan; [Bahar, Ali Nawaz] Univ Saskatchewan, Dept Elect & Comp Engn ECE, Saskatoon, SK S7N 5A9, Canada; [Mosleh, Mohammad] Islamic Azad Univ, Dezful Branch, Dept Comp Engn, Dezful 98210, Iran; [Yalcin, Senay] Nisantasi Univ, Dept Comp Engn, TR-34398 Istanbul, Turkiyeen_US
dc.description.abstractArea overhead and energy consumption continue to dominate the scalability issues of modern digital circuits. In this context, atomic silicon and reversible logic have emerged as suitable alternatives to address both issues. In this article, the authors propose novel nano-scale circuit design with low area and energy overheads using the same. In particular, the authors propose a reversible gate with Miller algorithm and atomic silicon technology. This article is extremely relevant in todays era, when the world is moving toward low area and low energy circuits for use in edge devices.en_US
dc.identifier.citation8
dc.identifier.doi10.1109/MDAT.2023.3261800en_US
dc.identifier.endpage69en_US
dc.identifier.issn2168-2356
dc.identifier.issn2168-2364
dc.identifier.issue5en_US
dc.identifier.scopus2-s2.0-85151529276en_US
dc.identifier.scopusqualityQ2
dc.identifier.startpage62en_US
dc.identifier.urihttps://doi.org/10.1109/MDAT.2023.3261800
dc.identifier.urihttps://hdl.handle.net/20.500.12469/5277
dc.identifier.volume40en_US
dc.identifier.wosWOS:001059677900009en_US
dc.identifier.wosqualityQ3
dc.khas20231019-WoSen_US
dc.language.isoenen_US
dc.publisherIEEE-Inst Electrical Electronics Engineers Incen_US
dc.relation.ispartofIeee Design & Testen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectLogic gatesen_US
dc.subjectSiliconen_US
dc.subjectAddersen_US
dc.subjectCostsen_US
dc.subjectCapacitance-voltage characteristicsen_US
dc.subjectQubiten_US
dc.subjectEnergy consumptionen_US
dc.subjectDigital circuitsen_US
dc.subjectScalabilityen_US
dc.subjectQuantum-DotEn_Us
dc.subjectNanoscale devicesen_US
dc.subjectAtomic Siliconen_US
dc.subjectReversible logicen_US
dc.subjectSimulationEn_Us
dc.subjectNanotechnologyen_US
dc.subjectMiller algorithmen_US
dc.subjectQuantum-Dot
dc.subjectFlip-flopen_US
dc.subjectSimulation
dc.subjectFull-Adder (FA)en_US
dc.titleAn Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithmen_US
dc.typeArticleen_US
dspace.entity.typePublication
relation.isAuthorOfPublication0fb3c7a0-c005-4e5f-a9ae-bb163df2df8e
relation.isAuthorOfPublication.latestForDiscovery0fb3c7a0-c005-4e5f-a9ae-bb163df2df8e

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