An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm
dc.authorid | Jafari Navimipour, Nima/0000-0002-5514-5536 | |
dc.authorid | Ahmadpour, Seyed-Sajad/0000-0003-2462-8030 | |
dc.authorwosid | Jafari Navimipour, Nima/AAF-5662-2021 | |
dc.contributor.author | Jafari Navimipour, Nima | |
dc.contributor.author | Jafari Navimipour, Nima | |
dc.contributor.author | Bahar, Ali Nawaz | |
dc.contributor.author | Mosleh, Mohammad | |
dc.contributor.author | Yalcin, Senay | |
dc.date.accessioned | 2023-10-19T15:11:55Z | |
dc.date.available | 2023-10-19T15:11:55Z | |
dc.date.issued | 2023 | |
dc.department-temp | [Ahmadpour, Seyed-Sajad; Jafari Navimipour, Nima] Kadir Has Univ, Dept Comp Engn, Fac Engn & Nat Sci, TR-34083 Istanbul, Turkiye; [Jafari Navimipour, Nima] Natl Yunlin Univ Sci & Technol, Future Technol Res Ctr, Touliu 64002, Taiwan; [Bahar, Ali Nawaz] Univ Saskatchewan, Dept Elect & Comp Engn ECE, Saskatoon, SK S7N 5A9, Canada; [Mosleh, Mohammad] Islamic Azad Univ, Dezful Branch, Dept Comp Engn, Dezful 98210, Iran; [Yalcin, Senay] Nisantasi Univ, Dept Comp Engn, TR-34398 Istanbul, Turkiye | en_US |
dc.description.abstract | Area overhead and energy consumption continue to dominate the scalability issues of modern digital circuits. In this context, atomic silicon and reversible logic have emerged as suitable alternatives to address both issues. In this article, the authors propose novel nano-scale circuit design with low area and energy overheads using the same. In particular, the authors propose a reversible gate with Miller algorithm and atomic silicon technology. This article is extremely relevant in todays era, when the world is moving toward low area and low energy circuits for use in edge devices. | en_US |
dc.identifier.citation | 8 | |
dc.identifier.doi | 10.1109/MDAT.2023.3261800 | en_US |
dc.identifier.endpage | 69 | en_US |
dc.identifier.issn | 2168-2356 | |
dc.identifier.issn | 2168-2364 | |
dc.identifier.issue | 5 | en_US |
dc.identifier.scopus | 2-s2.0-85151529276 | en_US |
dc.identifier.scopusquality | Q2 | |
dc.identifier.startpage | 62 | en_US |
dc.identifier.uri | https://doi.org/10.1109/MDAT.2023.3261800 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12469/5277 | |
dc.identifier.volume | 40 | en_US |
dc.identifier.wos | WOS:001059677900009 | en_US |
dc.identifier.wosquality | Q3 | |
dc.khas | 20231019-WoS | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE-Inst Electrical Electronics Engineers Inc | en_US |
dc.relation.ispartof | Ieee Design & Test | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Logic gates | en_US |
dc.subject | Silicon | en_US |
dc.subject | Adders | en_US |
dc.subject | Costs | en_US |
dc.subject | Capacitance-voltage characteristics | en_US |
dc.subject | Qubit | en_US |
dc.subject | Energy consumption | en_US |
dc.subject | Digital circuits | en_US |
dc.subject | Scalability | en_US |
dc.subject | Quantum-Dot | En_Us |
dc.subject | Nanoscale devices | en_US |
dc.subject | Atomic Silicon | en_US |
dc.subject | Reversible logic | en_US |
dc.subject | Simulation | En_Us |
dc.subject | Nanotechnology | en_US |
dc.subject | Miller algorithm | en_US |
dc.subject | Quantum-Dot | |
dc.subject | Flip-flop | en_US |
dc.subject | Simulation | |
dc.subject | Full-Adder (FA) | en_US |
dc.title | An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm | en_US |
dc.type | Article | en_US |
dspace.entity.type | Publication | |
relation.isAuthorOfPublication | 0fb3c7a0-c005-4e5f-a9ae-bb163df2df8e | |
relation.isAuthorOfPublication.latestForDiscovery | 0fb3c7a0-c005-4e5f-a9ae-bb163df2df8e |
Files
Original bundle
1 - 1 of 1
No Thumbnail Available
- Name:
- 5277.pdf
- Size:
- 1.14 MB
- Format:
- Adobe Portable Document Format
- Description:
- Tam Metin / Full Text