A nano-scale arithmetic and logic unit using a reversible logic and quantum-dots
dc.authorid | Jafari Navimipour, Nima/0000-0002-5514-5536 | |
dc.authorwosid | Jafari Navimipour, Nima/AAF-5662-2021 | |
dc.contributor.author | Navimipour, Nima Jafari | |
dc.contributor.author | Ahmadpour, Seyed-Sajad | |
dc.contributor.author | Yalcin, Senay | |
dc.date.accessioned | 2023-10-19T15:12:40Z | |
dc.date.available | 2023-10-19T15:12:40Z | |
dc.date.issued | 2023 | |
dc.department-temp | [Navimipour, Nima Jafari; Ahmadpour, Seyed-Sajad] Kadir Has Univ, Fac Engn & Nat Sci, Dept Comp Engn, Istanbul, Turkiye; [Yalcin, Senay] Nisantasi Univ, Dept Comp Engn, Istanbul, Turkiye; [Navimipour, Nima Jafari] Natl Yunlin Univ Sci & Technol, Future Technol Res Ctr, Touliu 64002, Taiwan | en_US |
dc.description.abstract | The arithmetic and logic unit (ALU) is a key element of complex circuits and an intrinsic part of the most widely recognized complex circuits in digital signal processing. Also, recent attention has been brought to reversible logic and quantum-dot cellular automata (QCA) because of their intrinsic capacity to decrease energy dissipation, which is a crucial need for low-power digital circuits. QCA will be the preferred technology for developing the subsequent generation of digital systems. These technologies played a substantial role in the design of the ALU for operations such as multiplication, subtraction, and division. In developing reversible logic and QCA technologies, the ALU is frequently studied as a central unit. Implementing an efficient ALU with low quantum cost and a small number of cells based on an efficient reversible block can solve all previous issues. Therefore, this research constructs a Feynman gate, a Fredkin gate, and full adder circuits using reversible logic and QCA technology. Using all of the specified circuits, a 20-operation ALU is constructed. The power consumption of the proposed ALU under various energy ranges demonstrated significant improvements over earlier designs. | en_US |
dc.identifier.citation | 3 | |
dc.identifier.doi | 10.1007/s11227-023-05491-x | en_US |
dc.identifier.issn | 0920-8542 | |
dc.identifier.issn | 1573-0484 | |
dc.identifier.scopus | 2-s2.0-85162631153 | en_US |
dc.identifier.scopusquality | Q2 | |
dc.identifier.uri | https://doi.org/10.1007/s11227-023-05491-x | |
dc.identifier.uri | https://hdl.handle.net/20.500.12469/5504 | |
dc.identifier.wos | WOS:001014762600004 | en_US |
dc.identifier.wosquality | N/A | |
dc.khas | 20231019-WoS | en_US |
dc.language.iso | en | en_US |
dc.publisher | Springer | en_US |
dc.relation.ispartof | Journal of Supercomputing | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Cellular-Automata | En_Us |
dc.subject | Full-Adder | En_Us |
dc.subject | Design | En_Us |
dc.subject | Reversible logic | en_US |
dc.subject | Area | en_US |
dc.subject | Cellular-Automata | |
dc.subject | Energy consumption | en_US |
dc.subject | Full-Adder | |
dc.subject | QCA | en_US |
dc.subject | Design | |
dc.subject | ALU | en_US |
dc.title | A nano-scale arithmetic and logic unit using a reversible logic and quantum-dots | en_US |
dc.type | Article | en_US |
dspace.entity.type | Publication |
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